Suggestions for Future Work

There are several ways in which this work could be extended. The reason for the disparity between the theoretical gain parameters and those used in the simulation needs to be explored, especially as the approximations obtained generally agree with those published by other sources. Specifying a filter for the extended model which models the noise filtering of an active second order phaselock loop should be considered. A realistic assumption would be to assume a 2nd order active PLL filter is present. The dependence of TDEV and MTIE on simulation time and sampling frequency could be more thoroughly explored in order to reduce simulation time. The possibility of using calculating TDEV continuously as the data is generated could be examined. The relationship between K_f, K_w and the strength of the noise sources in phaselock loop could be further examined. It would be more elegant if the post-processing was performed by SPW blocks. The use of C-TDEV as described in section 4.1.7 should be explored. Better theoretical expressions for TDEV and MTIE at the model output could possibly be obtained by using the saddle point method. It is envisaged that the purpose of this work is to provide a simulation tool for the behaviour of synchronisation reference chain so that a data path through SDH can be modelled. This would provide information on how synchronisation quality effects the transport of data through an SDH network.