Applying the ETSI Model to Primary Reference Clocks

As described in section 2.3.1, TDEV and MTIE masks have been defined to specify the acceptable wander of a Primary Reference Clock. In order to simulate a maximum reference chain as described in section 2.2.1, it was necessary to take into account the noise generated by a Primary Reference Clock. Considering that the noise produced when a clock locks its oscillator with an input signal is being simulated, it is questionable whether such a model is applicable to Primary Reference Clocks when it is taken into account that they produce the original synchronisation signal. However, typical implementations of Primary Reference Clocks utilise cesium to obtain an extremely high long term accuracy. However, it is believed that a phaselock loop is utilised in Primary Reference Clocks to improve the short term accuracy of the cesium source. Thus it is appropriate to use the ETSI noise model in order to generate the required noise.