Relationship between ETSI and PLL Noise Models

 In the following section, expressions for the power spectral density of the noise sources produced by each of the two branches of the ETSI noise model. Similar expressions will be obtained for noise sources inherent in a typical phaselock loop. Subsequently the two sets of expressions will be compared. It will be shown that the noise model that was simulated may be considered to be modelling the dominant noise sources inherent in a first order phaselock loop. The expressions will also be used in chapter 6 in order to obtain expressions for the TDEV of the noise produced at the model output.An extension to the model will be proposed so that it better reflects the characteristics of slave clocks.