Chapter 2 presents material from the European Telecommunications Standards Institute draft standards documents in order to define the problem. This includes details of the individual clock types as well as the architecture into which they are defined. The concept of a synchronisation reference chain is introduced. The standards by which clock quality are measured are then discussed followed by details of the model that was simulated. In discussing the model specifications a contradiction between the reported use and origin of the model and the individual clock standards is highlighted.
Chapter 3 then presents some background theory relevant to the model that has been introduced. Some basic definitions of frequency metrology measures are given in order to define the physical significance of the data being produced at the model output. Different noise types that are present in clocks are then characterised in terms of their power spectral density. This allows an explanation as to the function of a major model component to be presented. The second major topic of the chapter is a review of PLL theory. As it will be subsequently seen that the model can be interpreted as modelling the noise produced by a 1st order phaselock loop, basic PLL theory is presented so that it may be drawn upon in chapter 5 and subsequently.
Chapter 4 goes on to discuss in detail the statistical quantities by which clock timing stability is characterised. The inappropriateness of conventional statistical measures in characterising clock noise is first shown followed by the derivation of an alternative. An expression for this alternative measure, known as TDEV is obtained as a function of variety of quantities. The method by which the measure can be used to characterise the noise types inherent in a clock is also discussed. An approximate, more analytically tractable expression for TDEV is obtained which will be subsequently used to obtain approximations for appropriate model parameters. This TDEV approximation is then used to present a useful way of depicting the underlying algorithm inherent in TDEV. A measure characterising the transient errors on a signal known as MTIE is also presented.
Chapter 5 then draws a link between the material in chapters 2 and 3. By obtaining expressions for the power spectral density at various points in the model and a noisy phaselock loop, the model is shown to be equivalent to a 1st order PLL. The validity of the assumptions that are found to be inherent in the model are discussed by further drawing upon the PLL theory of the previous chapter. Finally, an extension to the basic model is suggested.
Chapter 6 uses the analysis and approximation to TDEV from the previous chapter to obtain approximations for TDEV at the model output. Limiting values for these expressions are then obtained and used to obtain approximate values for the gain parameters in the noise model. These are compared with published approximations and found to agree. The TDEV expressions are also used to explain the form of the standards for individual clock types. A problem with the form of the standard for one particular type of clock is highlighted. The material is also used in conjunction with published experimental data to substantiate the assumptions in the model and so that it can subsequently be shown that the model produces data of similar form to real life clocks.
The method by which the model and synchronisation reference chain were simulated are described in chapter 7. This includes details on how the basic model, extended model and subsequently the reference chain were simulated as well as the steps that were taken to minimise the demands the research made on computer facilities. The method by which post processing was performed is described briefly with the source code included in appendices B.1 and B.2.
Results of simulations are presented in chapter 8. The chapter gives the basic model results for individual clocks satisfying the wander masks and hence model parameters allowing the clocks to satisfy the masks. Data from three points in the maximum reference chain are presented for both the original and extended models. Results are highlighted which show how the extended model simulates the noise filtering characteristic of a Synchronisation Supply Unit. Initial data highlighting a potential problem with one of the filters is presented. Results from the simulation of this are also given as well as graphical analysis from the symbolic mathematics package Mathematica . These substantiate the belief that there is a factor missing in the filter transfer function for filter A. The appropriate use of certain SPW block is shown by reference to additional simulations.
Chapter 9 summarises and concludes the main findings of the work. As well as summarising the main results, areas suitable for future work are suggested and how the work has increased knowledge in the field of SDH synchronisation.